@article {5166,
	title = {A Sub-{\textmu}W Energy-Performance-Aware IoT SoC with a Triple-Mode Power Management Unit for System Performance Scaling, Fast DVFS, and Energy Minimization},
	journal = {IEEE Journal of Solid-State Circuits},
	year = {2024},
	author = {Xinjian Liu and Sumanth Kamineni and Jacob Breiholz and Benton H. Calhoun and Shuo Li}
}
@conference {5136,
	title = {Scalable All-Analog LDOs With Reduced Input Offset Variability Using Digital Synthesis Flow in 65-nm CMOS},
	booktitle = {IEEE Transactions on Very Large Scale Integration (TVLSI) Systems},
	year = {2023},
	author = {Shourya Gupta and Shuo Li and Benton H. Calhoun}
}
@conference {5096,
	title = {A Self-Powered SoC with Distributed Cooperative Energy Harvesting and Multi-Chip Power Management for System-in-Fiber},
	booktitle = {IEEE International Solid-State Circuits Conference (ISSCC)},
	year = {2023},
	month = {2023},
	author = {Xinjian Liu and Daniel S. Truesdell and Omar Faruqe and Lalitha Parameswaran and Michael Rickley and Andrew Kopanski and Lauren Cantley and Austin Coon and Matthew Bernasconi and Tairan Wang and Benton H. Calhoun}
}
@article {5066,
	title = {A Sub-nW 93\% Peak Efficiency Buck Converter with Wide Dynamic Range, Fast DVFS, and Asynchronous Load-Transient Control},
	journal = {IEEE Journal of Solid-State Circuits, (invited paper)},
	year = {2022},
	author = {Xinjian Liu and Benton H. Calhoun and Shuo Li}
}
@conference {5016,
	title = {Stacked Transconductance Boosting for Ultra-Low Power 2.4GHz RF Front-End Design},
	booktitle = {2021 IEEE International Symposium on Circuits and Systems (ISCAS)},
	year = {2021},
	month = {05/2021},
	author = {Anjana Dissanayake and Steven M. Bowers and Benton H. Calhoun}
}
@article {4926,
	title = {A Single-Supply 6-Transistor Voltage Level Converter Design Reaching 8.18-fJ/Transition at 0.3-1.2-V Range or 44-fW Leakage at 0.8-2.5-V Range},
	journal = {IEEE Solid-State Circuits Letters (SSCL)},
	year = {2020},
	author = {Daniel S. Truesdell and Benton H. Calhoun}
}
@conference {4861,
	title = {Sub-microAmp Energy Harvesting and Power Management Units for Self-Powered IoT SoCs: Analog vs. Digital Implementations},
	booktitle = {2020 IEEE Custom Integrated Circuits Conference (CICC), (invited paper)},
	year = {2020},
	month = {03/2020},
	author = {Shuo Li and Benton H. Calhoun}
}
@conference {429,
	title = {Soft Errors: Reliability Challenges in Energy-Constrained ULP Body Sensor Networks Applications},
	booktitle = {23rd IEEE International Symposium on On-Line Testing and Robust System Design},
	year = {2017},
	month = {06/2017},
	publisher = {IEEE},
	organization = {IEEE},
	address = {Thessaloniki, Greece},
	author = {Harsh N. Patel and Randy W. Mann and Benton H. Calhoun}
}
@conference {430,
	title = {Subthreshold SRAM: Challenges, Design Decisions, and Solutions},
	booktitle = {60th IEEE International Midwest Symposium on Circuits and Systems},
	year = {2017},
	month = {08/2017},
	publisher = {IEEE},
	organization = {IEEE},
	address = {Boston, MA, USA},
	author = {Harsh N. Patel and Farah B. Yahya and Benton H. Calhoun}
}
@article {383,
	title = {A Sub-threshold 8T SRAM Macro with 12.29nW/KB Standby Power and 6.24 pJ/access for Battery-Less IoT SoCs},
	journal = {J. Low Power Electron. Appl. (JLPEA)},
	volume = {6},
	year = {2016},
	author = {F. Yahya and H. Patel and Boley, J. and A. Banerjee and B. H. Calhoun}
}
@conference {350,
	title = {Stack Based Sense Amplifier Designs for Reducing Input-Referred Offset},
	booktitle = {International Symposium on Quality Electronic Design},
	year = {2015},
	month = {03/2015},
	author = {Boley, J. and B. H. Calhoun}
}
@conference {356,
	title = {Self Calibrated Dynamic Write Margin Sensor for Low Power Read/Write Operations in Sub-32nm SRAM},
	booktitle = {Design Automation Conference (DAC)},
	year = {2014},
	author = {P. Beshay and V. Chandra and R. Aitken and B. H. Calhoun}
}
@conference {304,
	title = {SRAM Sense Amplifier Offset Cancellation Using BTI Stress},
	booktitle = {Subthreshold Microelectronics Conference},
	year = {2012},
	month = {10/2012},
	author = {Peter Beshay and Jonathan Bolus and Travis Blalock and Vikas Chandra and Benton H. Calhoun}
}
@conference {305,
	title = {Sub-threshold Sense Amplifier Compensation Using Auto-zeroing Circuitry},
	booktitle = {Subthreshold Microelectronics Conference},
	year = {2012},
	month = {10/2012},
	author = {Peter Beshay and Joseph F. Ryan and Benton H. Calhoun}
}
@conference {246,
	title = {Stepped Supply Voltage Switching for Energy Constrained Systems},
	booktitle = {ISQED},
	year = {2011},
	author = {Sudhanshu Khanna and Kyle Craig and Yousef Shakhsheer and Saad Arrabi and John Lach and Benton Calhoun}
}
@booklet {286,
	title = {A Sub-0.5V Lattice-Based Public-Key Encryption Scheme for RFID Platforms in 130nm},
	year = {2011},
	address = {2011 Workshop on RFID Security},
	author = {Y. Yu and J. Huang and S. Khanna and B. H. Calhoun and J. Lach and A. Shelat and D. Evans}
}
@booklet {271,
	title = {A sub-threshold clock and data recovery circuit for a wireless sensor node},
	year = {2011},
	author = {Aatmesh Shrivastava and Benton H. Calhoun}
}
@conference {276,
	title = {A Sub-Threshold FPGA: Energy-Efficient Reconfigurable Logic},
	booktitle = {GOMAC Tech},
	year = {2011},
	month = {03/2011},
	author = {Benton H. Calhoun and Yanqing Zhang and Sudhanshu Khanna and Kyle Craig and Yousef Shakhsheer and John Lach}
}
@conference {53,
	title = {SRAM-Based NBTI/PBTI Sensor System Design},
	booktitle = {Design Automation Conference (DAC)},
	year = {2010},
	month = {06/2010},
	pages = {849-852},
	address = {San Diego, CA},
	author = {Jerry Qi and Jiajing Wang and Benton H. Calhoun and Mircea Stan}
}
@inbook {39,
	title = {Standby Supply Voltage Minimization for Reliable Nanoscale SRAMs},
	booktitle = {Solid State Circuits Technologies},
	year = {2010},
	publisher = {INTECH},
	organization = {INTECH},
	chapter = {6},
	isbn = {978-953-307-045-2},
	url = {http://sciyo.com/articles/show/title/standby-supply-voltage-minimization-for-reliable-nanoscale-srams},
	author = {Jiajing Wang and Benton H. Calhoun},
	editor = {Jacobus W. Swart}
}
@conference {79,
	title = {A Sub-Threshold FPGA with Low-Swing Dual-VDD Interconnect in 90nm CMOS},
	booktitle = {Custom Integrated Circuits Conference (CICC)},
	year = {2010},
	month = {20/09/2010},
	author = {Joseph F. Ryan and Benton H. Calhoun}
}
@conference {73,
	title = {System Design Principles Combining Sub-threshold Circuits and Architectures with Energy Scavening Mechanisms},
	booktitle = {International Symposium on Circuits and Systems (ISCAS)},
	year = {2010},
	month = {05/2010},
	pages = {269-272},
	address = {Paris, France},
	url = {http://class6.ee.virginia.edu/bentemp/drupal/files/Calhoun_ISCAS2010.pdf},
	author = {Benton H. Calhoun and Sudhanshu Khanna and Yanqing Zhang and Joseph Ryan and Brian Otis}
}
@conference {12,
	title = {Serial Sub-threshold Circuits for Ultra-Low-Power Systems},
	booktitle = {International Symposium on Low Power Electronics and Design},
	year = {2009},
	month = {8/19/2009},
	author = {Sudhanshu Khanna and Benton H. Calhoun}
}
@conference {28,
	title = {An SRAM Prototyping Tool for Rapid Sub-32nm Design Exploration and Optimization},
	booktitle = {TECHCON},
	year = {2009},
	abstract = {SRAM design in scaled technologies increasingly requires circuit innovations such as read/write assist techniques or alternative bitcells to ensure even basic functionality. However, the lack of a quick mechanism for understanding the impact of these circuit level changes on system level metrics makes accurate assessments of new circuit techniques difficult. Thus, we introduce Virtual Prototyper (ViPro), a tool that helps circuit designers explore this large design space by rapidly generating optimized virtual prototypes of complete SRAM macros. ViPro does this by allowing SRAM component specification with varying levels of detail {\textendash} from {\textquoteleft}black-box{\textquoteright} descriptions to complete netlists {\textendash} and by incorporating those components into a hierarchical model that captures circuit and architectural features of the SRAM to optimize a complete prototype. SRAM designers can use ViPro to generate base-case prototypes, which provide starting points for design space exploration, or to assess the impact of a low level circuit innovation on the overall SRAM design.},
	author = {M. Bhargava and S. Nalam and B. H. Calhoun and K. Mai}
}
@conference {calhoun-sub,
	title = {Sub-threshold Circuit Design with Shrinking CMOS Devices},
	booktitle = {International Symposium on Circuits and Systems},
	year = {2009},
	month = {3/24/2009},
	author = {B. H. Calhoun and S. Khanna and Mann, R. and J. Wang}
}
@conference {15,
	title = {Sub-threshold Operation and Cross-Hierarchy Design for Ultra Low Power Wearable Sensors},
	booktitle = {International Symposium on Circuits and Systems},
	year = {2009},
	month = {5/24/2009},
	author = {Benton H. Calhoun and Jonathan Bolus and Sudhanshu Khanna and Andrew D. Jurik and Alf F. Weaver and Travis N. Blalock}
}
@conference {25,
	title = {Statistical Modeling for the Minimum Standby Supply Voltage of a Full SRAM Array},
	booktitle = {European Solid State Circuits Conference (ESSCIRC)},
	year = {2007},
	month = {00/09/2007},
	pages = {400-403},
	author = {Jiajing Wang and Amith Singhee and Rob A. Rutenbar and Benton H. Calhoun}
}
@article {60,
	title = {Static Noise Margin Variation for Sub-threshold SRAM in 65nm CMOS},
	journal = {IEEE Journal of Solid-State Circuits (JSSC)},
	volume = {41},
	year = {2006},
	month = {07/2006},
	pages = {1673-1679},
	author = {Benton H. Calhoun and Anantha Chandrakasan}
}
@book {83,
	title = {Sub-threshold Design for Ultra Low-Power Systems},
	year = {2006},
	publisher = {Springer},
	organization = {Springer},
	author = {Alice Wang and Benton H. Calhoun, Anantha Chandrakasan}
}
@conference {52,
	title = {Sub-threshold Design: The Challenges of Minimizing Circuit Energy},
	booktitle = {International Symposium on Low Power Electronics and Design (ISLPED)},
	year = {2006},
	month = {10/2006},
	pages = {366-368},
	author = {Benton H. Calhoun and Alice Wang and Naveen Verma and Anantha Chandrakasan}
}
@article {56,
	title = {Standby Power Reduction Using Dynamic Voltage Scaling and Flip-Flop Structures},
	journal = {IEEE Journal of Solid-State Circuits (JSSC)},
	volume = {39},
	year = {2004},
	month = {09/2004},
	pages = {1504-1511},
	author = {Benton H. Calhoun and Anantha Chandrakasan}
}
@conference {44,
	title = {Standby Voltage Scaling for Reduced Power},
	booktitle = {Custom Integrated Circuits Conference (CICC)},
	year = {2003},
	month = {09/2003},
	pages = {639-642},
	author = {Benton Calhoun and Anantha Chandrakasan}
}
