@conference {37,
	title = {Asymmetric 6T SRAM with Two-phase Write and Split Bitline Differential Sensing for Low Voltage Operation},
	booktitle = {ISQED},
	year = {2010},
	pages = {139-146},
	author = {S. Nalam and V. Chandra and C. Pietrzyk and R. C. Aitken and B. H. Calhoun}
}
@conference {11,
	title = {Asymmetric Sizing in a 45nm 5T SRAM to Improve Read Stability over 6T},
	booktitle = {CICC},
	year = {2009},
	pages = {709-712},
	author = {S. Nalam and B. H. Calhoun}
}
@conference {21,
	title = {Analyzing Static and Dynamic Write Margin for Nanometer SRAMs},
	booktitle = {International Symposium on Low Power Electronics and Design},
	year = {2008},
	month = {08/2008},
	pages = {129-134},
	author = {J. Wang and S. Nalam and B. H. Calhoun}
}
