@article {288,
	title = {Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin},
	journal = {Journal of Low Power Electronics and Applications},
	year = {2012},
	month = {04/2012},
	author = {James Boley and Jiajing Wang and B. H. Calhoun}
}
@conference {27,
	title = {Analyzing and Modeling Process Balance for Sub-threshold Circuit Design},
	booktitle = {GLSVLSI},
	year = {2007},
	month = {00/03/2007},
	pages = {275-280},
	author = {Joseph F. Ryan and Jiajing Wang and Benton H. Calhoun}
}
