@conference {5106,
	title = {AuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells},
	booktitle = {Design, Automation and Test in Europe Conference (DATE), 2023},
	year = {2023},
	month = {04/2023},
	author = {Sumanth Kamineni and Arvind Sharma and Ramesh Harjani and Sachin S. Sapatnekar and Benton H. Calhoun}
}
@conference {4851,
	title = {Application-Driven Model of a PPG Sensing Modality for the Informed Design of Self-Powered, Wearable Healthcare Systems},
	booktitle = {2020 IEEE International Symposium on Circuits and Systems (ISCAS)},
	year = {2020},
	author = {Henry L. Bishop and Peng Wang and Benton H. Calhoun}
}
@article {4721,
	title = {Analysis and Design of an Ultra-Low-Power Bluetooth Low-Energy Transmitter With Ring Oscillator-Based ADPLL and 4 Frequency Edge Combiner},
	journal = {IEEE Journal of Solid-State Circuits},
	year = {2019},
	month = {02/2019},
	author = {Xing Chen and Jacob Breiholz and Farah B Yahya and Christopher J Lukas and Hun-Seok Kim and Benton H Calhoun and David D Wentzloff}
}
@conference {433,
	title = {Auger Effect Limited Performance in Tunnel Field Effect Transistors},
	booktitle = {5th Berkeley Symposium on Energy Efficient Electronics \& Steep Transistors Workshop},
	year = {2017},
	month = {10/2017},
	address = {Berkeley, CA},
	url = {https://ieeexplore.ieee.org/document/8246156/},
	author = {Sheikh Z. Ahmed and Yaohua Tan and Daniel S. Truesdell and Avik Ghosh}
}
@article {288,
	title = {Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin},
	journal = {Journal of Low Power Electronics and Applications},
	year = {2012},
	month = {04/2012},
	author = {James Boley and Jiajing Wang and B. H. Calhoun}
}
@article {339,
	title = {Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM VMIN},
	journal = {Journal of Low Power Electronics and Applications (JLPEA)},
	volume = {2},
	year = {2012},
	month = {04/2012},
	pages = {12},
	chapter = {143},
	author = {Boley, J. and J. Wang and B. H. Calhoun}
}
@conference {285,
	title = {An Analytical Model for Performance Yield of Nanoscale SRAM Accounting for the Sense Amplifier Strobe Signal},
	booktitle = {Internation Symposium on Lower Power Electronics and Design (ISLPED)},
	year = {2011},
	author = {J. F. Ryan and S. Khanna and B. H. Calhoun}
}
@booklet {272,
	title = {Analyzing Subthreshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin},
	year = {2011},
	author = {Boley, J. and B. H. Calhoun and J. Wang}
}
@conference {37,
	title = {Asymmetric 6T SRAM with Two-phase Write and Split Bitline Differential Sensing for Low Voltage Operation},
	booktitle = {ISQED},
	year = {2010},
	pages = {139-146},
	author = {S. Nalam and V. Chandra and C. Pietrzyk and R. C. Aitken and B. H. Calhoun}
}
@conference {11,
	title = {Asymmetric Sizing in a 45nm 5T SRAM to Improve Read Stability over 6T},
	booktitle = {CICC},
	year = {2009},
	pages = {709-712},
	author = {S. Nalam and B. H. Calhoun}
}
@conference {21,
	title = {Analyzing Static and Dynamic Write Margin for Nanometer SRAMs},
	booktitle = {International Symposium on Low Power Electronics and Design},
	year = {2008},
	month = {08/2008},
	pages = {129-134},
	author = {J. Wang and S. Nalam and B. H. Calhoun}
}
@conference {27,
	title = {Analyzing and Modeling Process Balance for Sub-threshold Circuit Design},
	booktitle = {GLSVLSI},
	year = {2007},
	month = {00/03/2007},
	pages = {275-280},
	author = {Joseph F. Ryan and Jiajing Wang and Benton H. Calhoun}
}
@conference {49,
	title = {Analyzing Static Noise Margin for Sub-threshold SRAM in 65nm CMOS},
	booktitle = {European Solid-State Circuits Conference},
	year = {2005},
	month = {09/2005},
	pages = {363-366},
	author = {Benton H. Calhoun and Anantha Chandrakasan}
}
