@article {4766,
	title = {A 6{\textendash}140-nW 11 Hz{\textendash}8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic},
	journal = {IEEE Solid-State Circuits Letters (SSCL)},
	year = {2019},
	month = {08/2019},
	url = {https://ieeexplore.ieee.org/document/8822384},
	author = {Daniel S. Truesdell and Jacob Breiholz and Sumanth Kamineni and NingXi Liu and Albert Magyar and Benton H. Calhoun}
}
