@conference {434,
	title = {A 256kb 6T self-tuning SRAM with extended 0.38V{\textendash}1.2V operating range using multiple read/write assists and VMIN tracking canary sensors},
	booktitle = {2017 IEEE Custom Integrated Circuits Conference (CICC)},
	year = {2017},
	address = {Austin, TX, 2017},
	author = {A. Banerjee and N. Liu and H. N. Patel and B. H. Calhoun},
	editor = {J. Poulton and C. T. Gray}
}
@conference {390,
	title = {A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic},
	booktitle = {European Solid State Circuits Conference (ESSCIRC)},
	year = {2016},
	author = {H. N. Patel and Roy, A. and F. B. Yahya and N. Liu and K. Kumeno and M. Yasuda and A. Harada and T. Ema and B. H. Calhoun}
}
@conference {391,
	title = {Design Optimization of Register File Throughput and Energy using a Virtual Prototyping (ViPro) Tool},
	booktitle = {IEEE Computer Society Annual Symposium on VLSI (ISVLSI)},
	year = {2016},
	author = {N. Liu and B. H. Calhoun}
}
