@article {326,
	title = {A Digital Auto-Zeroing Circuit to Reduce Offset in Sub-threshold Sense Amplifiers},
	journal = {Journal of Low Power Electronics and Applications},
	year = {2013},
	month = {05/2013},
	type = {Journal Article},
	url = {http://www.mdpi.com/2079-9268/3/2/159},
	author = {Peter Beshay and Joseph F. Ryan and Benton H. Calhoun}
}
@conference {305,
	title = {Sub-threshold Sense Amplifier Compensation Using Auto-zeroing Circuitry},
	booktitle = {Subthreshold Microelectronics Conference},
	year = {2012},
	month = {10/2012},
	author = {Peter Beshay and Joseph F. Ryan and Benton H. Calhoun}
}
@conference {79,
	title = {A Sub-Threshold FPGA with Low-Swing Dual-VDD Interconnect in 90nm CMOS},
	booktitle = {Custom Integrated Circuits Conference (CICC)},
	year = {2010},
	month = {20/09/2010},
	author = {Joseph F. Ryan and Benton H. Calhoun}
}
@conference {22,
	title = {Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-threshold Operation},
	booktitle = {International Symposium on Quality Electronic Design},
	year = {2008},
	month = {03/2008},
	pages = {127-132},
	author = {Joseph F. Ryan and Benton H. Calhoun}
}
@conference {27,
	title = {Analyzing and Modeling Process Balance for Sub-threshold Circuit Design},
	booktitle = {GLSVLSI},
	year = {2007},
	month = {00/03/2007},
	pages = {275-280},
	author = {Joseph F. Ryan and Jiajing Wang and Benton H. Calhoun}
}
