@conference {342,
	title = {Modeling SRAM Dynamic VMIN},
	booktitle = {International Conference on IC Design and Technology (ICICDT)},
	year = {2014},
	month = {06/2014},
	author = {Boley, J. and V. Chandra and R. Aitken and B. H. Calhoun}
}
@conference {356,
	title = {Self Calibrated Dynamic Write Margin Sensor for Low Power Read/Write Operations in Sub-32nm SRAM},
	booktitle = {Design Automation Conference (DAC)},
	year = {2014},
	author = {P. Beshay and V. Chandra and R. Aitken and B. H. Calhoun}
}
@conference {239,
	title = {Dynamic Write Limited Minimum Operating Voltage for Nanoscale SRAM},
	booktitle = {Design Automation and Test Europe (DATE)},
	year = {2011},
	month = {03/2011},
	author = {S. Nalam and V. Chandra and R. C. Aitken and B. H. Calhoun}
}
@conference {37,
	title = {Asymmetric 6T SRAM with Two-phase Write and Split Bitline Differential Sensing for Low Voltage Operation},
	booktitle = {ISQED},
	year = {2010},
	pages = {139-146},
	author = {S. Nalam and V. Chandra and C. Pietrzyk and R. C. Aitken and B. H. Calhoun}
}
