@conference {70,
	title = {Virtual Prototyper (ViPro): An Early Design Space Exploration and Optimization Tool for SRAM Designers},
	booktitle = {Design Automation Conference (DAC)},
	year = {2010},
	month = {06/2010},
	pages = {138-143},
	author = {S. Nalam and M. Bhargava and K. Mai and B. H. Calhoun}
}
@conference {28,
	title = {An SRAM Prototyping Tool for Rapid Sub-32nm Design Exploration and Optimization},
	booktitle = {TECHCON},
	year = {2009},
	abstract = {SRAM design in scaled technologies increasingly requires circuit innovations such as read/write assist techniques or alternative bitcells to ensure even basic functionality. However, the lack of a quick mechanism for understanding the impact of these circuit level changes on system level metrics makes accurate assessments of new circuit techniques difficult. Thus, we introduce Virtual Prototyper (ViPro), a tool that helps circuit designers explore this large design space by rapidly generating optimized virtual prototypes of complete SRAM macros. ViPro does this by allowing SRAM component specification with varying levels of detail {\textendash} from {\textquoteleft}black-box{\textquoteright} descriptions to complete netlists {\textendash} and by incorporating those components into a hierarchical model that captures circuit and architectural features of the SRAM to optimize a complete prototype. SRAM designers can use ViPro to generate base-case prototypes, which provide starting points for design space exploration, or to assess the impact of a low level circuit innovation on the overall SRAM design.},
	author = {M. Bhargava and S. Nalam and B. H. Calhoun and K. Mai}
}
@conference {36,
	title = {A Technology-Agnostic Simulation Environment (TASE) for Iterative Custom IC Design across Processes},
	booktitle = {ICCD},
	year = {2009},
	pages = {523-528},
	author = {S. Nalam and M. Bhargava and Ringgenberg, K. and K. Mai and B. H. Calhoun}
}
