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Alternative Bitcells

In this paper, we propose a 9T half-select-free subthreshold bitcell that has 2.05X lower mean read energy, 12.39% lower mean write energy, and 28% lower mean leakage current than conventional 8T bitcells at the TT_0.4V_27C corner. Our bitcell also supports the bitline interleaving technique that can cope with soft errors.

In this project, 5T and 6T cells that use asymmetric sizing and single-ended read to achieve better trade-offs between noise margins, power, performance, and area. A new pseudo differential sensing scheme for single-ended cells is also explored.

Faculty: Professor Ben Calhoun Students: Arijit Banerjee, Satya Nalam Industry: Asymmetric 6T - Vikas Chandra, Cezary Pietrzyk, Rob Aitken (ARM) 5T - Alexander Hoefler (Freescale)

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