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90nm Bulk Test Chip for SRAM Standby VDD Scaling System based on Canary Replicas

In this test chip, we implemented a canary-based closed-loop SRAM VDD scaling system to achieve aggressive leakage power savings by tracking PVT variations through online canary cell monitors and robust feedback circuits that operate robustly at sub-threshold supply voltages. The measurement result confirms the function of the canary system. It also shows that the canary approach offers ∼5× power reduction compared with the conservative worst-case approach and ∼11× reduction compared with using the nominal VDD.