VLSI Design Group


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A 150nW, 5ppm/oC, 100kHz On-Chip Clock Source for Ultra Low Power SoCs

In this project we designed an ultra low power clock source for our BSN chip. The ultra low power clock source is designed using a 1µW temperature compensated on-chip digitally controlled oscillator (OscCMP) and a 100nW uncompensated oscillator (OscUCMP) with respective temperature stabilities of 5ppm/oC and 1.67%/oC. It also has a fast locking circuit that re-locks OscUCMP to OscCMP often enough to achieve high effective temperature stability. Measurements of a 130nm CMOS chip show that this combination gives a stability of 5ppm/oC from 20oC to 40oC (14ppm/oC from 20oC to 70oC) at 150nW if temperature changes by 1oC or less every second. The proposed circuit exhibits similar stability to an XTAL with ~7X less power and no off-chip components, provides a low cost ULP solution for wireless sensors and BSNs.