@conference {434,
	title = {A 256kb 6T self-tuning SRAM with extended 0.38V{\textendash}1.2V operating range using multiple read/write assists and VMIN tracking canary sensors},
	booktitle = {2017 IEEE Custom Integrated Circuits Conference (CICC)},
	year = {2017},
	address = {Austin, TX, 2017},
	author = {A. Banerjee and N. Liu and H. N. Patel and B. H. Calhoun},
	editor = {J. Poulton and C. T. Gray}
}
@article {382,
	title = {A 0.2 V, 23 nW CMOS Temperature Sensor for Ultra-Low-Power IoT Applications},
	journal = {J. Low Power Electron. Appl. (JLPEA)},
	volume = {6},
	year = {2016},
	author = {D. Akella Kamakshi and A. Shrivastava and B. H. Calhoun}
}
@article {387,
	title = {A 1.5nW, 32.768kHz XTAL Oscillator Operational from 0.3V Supply},
	journal = {IEEE Journal of Solid-State Circuits (JSSC)},
	volume = {51},
	year = {2016},
	author = {A. Shrivastava and Akella, D. and B. H. Calhoun}
}
@conference {393,
	title = {A 236nW -56.5dBm Sensitivity Self-Powered Bluetooth Low-Energy Wakeup Receiver in 65nm CMOS},
	booktitle = {IEEE International Solid-State Circuits Conference (ISSCC)},
	year = {2016},
	author = {Roberts, N. E. and K. Craig and A. Shrivastava and S. N. Wooters and Y. Shakhsheer and B. H. Calhoun and Wentzloff, D. D.}
}
@article {384,
	title = {A 36nW, 7 ppm/oC Fully On-Chip Clock Source System for Ultra-Low Power Applications},
	journal = {Journal of Low Power Electronics and Applications (JLPEA)},
	volume = {6},
	year = {2016},
	author = {Akella, D. and A. Shrivastava and C. Duan and B. H. Calhoun}
}
@conference {390,
	title = {A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic},
	booktitle = {European Solid State Circuits Conference (ESSCIRC)},
	year = {2016},
	author = {H. N. Patel and Roy, A. and F. B. Yahya and N. Liu and K. Kumeno and M. Yasuda and A. Harada and T. Ema and B. H. Calhoun}
}
@article {381,
	title = {A Design and Theoretical Analysis of a 145 mV to 1.2 V Single-Ended Level Converter Circuit for Ultra-Low Power Low Voltage ICs},
	journal = {J. Low Power Electron. Appl. (JLPEA)},
	volume = {6},
	year = {2016},
	author = {Y. Huang and A. Shrivastava and L. Barnes and B. H. Calhoun}
}
@conference {391,
	title = {Design Optimization of Register File Throughput and Energy using a Virtual Prototyping (ViPro) Tool},
	booktitle = {IEEE Computer Society Annual Symposium on VLSI (ISVLSI)},
	year = {2016},
	author = {N. Liu and B. H. Calhoun}
}
@article {385,
	title = {Development of an artificial sensor for hydrodynamic detection inspired by a seal{\textquoteright}s whisker array},
	journal = {Bioinspiration and Biomimetics},
	year = {2016},
	author = {W. Eberhardt and B. Wakefield and C. Casey and C. Murphy and B. H. Calhoun and C. Reichmuth}
}
@conference {392,
	title = {Modeling and Analysis of Power Supply Noise Tolerance with Fine-grained GALS Adaptive Clocks},
	booktitle = {ASYNC},
	year = {2016},
	author = {D. Kamakshi and M. Fojtik and B. Khailany and S. Kudva and Y. Zhou and B. H. Calhoun}
}
@article {383,
	title = {A Sub-threshold 8T SRAM Macro with 12.29nW/KB Standby Power and 6.24 pJ/access for Battery-Less IoT SoCs},
	journal = {J. Low Power Electron. Appl. (JLPEA)},
	volume = {6},
	year = {2016},
	author = {F. Yahya and H. Patel and Boley, J. and A. Banerjee and B. H. Calhoun}
}
@conference {389,
	title = {A Tunnel FET Design for High-Current, 120 mV Operation},
	booktitle = {IEDM},
	year = {2016},
	author = {P. Long and J. Z. Huang and M. Povolotskyi and D. Verreck and J. Charles and T. Kubis and G. Klimeck and M. J.W. Rodwell and B. H. Calhoun}
}
@article {388,
	title = {A 10mV-Input Boost Converter with Inductor Peak Current Control and Zero Detection for Thermoelectric and Solar Energy Harvesting with 220mV Cold-Start and -14.5dBm, 915MHz RF Kick-Start},
	journal = {IEEE Journal of Solid-State Circuits (JSSC)},
	volume = {50},
	year = {2015},
	month = {08/2015},
	pages = {1820-1832},
	author = {A. Shrivastava and Roberts, N. E. and O. U. Khan and Wentzloff, D. D. and B. H. Calhoun}
}
@conference {394,
	title = {A 145mV to 1.2V Single Ended Level Converter Circuit for Ultra-Low Power Low Voltage ICs},
	booktitle = {IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)},
	year = {2015},
	author = {Y. Huang and A. Shrivastava and B. H. Calhoun}
}
@conference {397,
	title = {A 32nW Bandgap Reference Voltage Operational from 0.5V Supply for Ultra-low Power Systems},
	booktitle = {EEE International Solid-State Circuits Conference (ISSCC)},
	year = {2015},
	author = {A. Shrivastava and K. Craig and N. Roberts and Wentzloff, D. D. and B. H. Calhoun}
}
@conference {353,
	title = {Error-Energy Analysis of Hardware Logarithmic Approximation Methods for Low Power Applications},
	booktitle = {International Symposium on Circuits and Systems (ISCAS)},
	year = {2015},
	month = {05/2015},
	author = {Klinefelter, A. and J. Ryan and Tschanz, J. and B. H. Calhoun}
}
@conference {350,
	title = {Stack Based Sense Amplifier Designs for Reducing Input-Referred Offset},
	booktitle = {International Symposium on Quality Electronic Design},
	year = {2015},
	month = {03/2015},
	author = {Boley, J. and B. H. Calhoun}
}
@conference {396,
	title = {Ultra Low Power Circuits and Systems for Self Powered Wireless Sensors},
	booktitle = {GOMACTech},
	year = {2015},
	author = {Y. Shakhsheer and A. Shrivastava and N. Roberts and K. Craig and S. Wooters and Wentzloff, D. D. and B. H. Calhoun}
}
@conference {395,
	title = {Ultra-Low Power Wireless SoCs Enabling a Batteryless IoT},
	booktitle = {HOT Chips},
	year = {2015},
	author = {B. H. Calhoun and Wentzloff, D. D.}
}
@conference {341,
	title = {A 10mV-Input Boost Converter with Inductor Peak Current Control and Zero Detection for Thermoelectric Energy Harvesting},
	booktitle = {IEEE Custom Integrated Circuits Conference (CICC)},
	year = {2014},
	month = {2014},
	author = {A. Shrivastava and D. Wentzloff and B. H. Calhoun}
}
@conference {343,
	title = {A 1.2μW SIMO Energy Harvesting and Power Management Unit with Constant Peak Inductor Current Control Achieving 83-92\% Efficiency Across Wide Input and Output Voltages},
	booktitle = {Symposium on VLSI Circuits},
	year = {2014},
	month = {2014},
	author = {A. Shrivastava and Y. K. Ramadass and S. Khanna and S. Bartling and B. H. Calhoun}
}
@article {337,
	title = {39 fJ/bit On-Chip Identification of Wireless Sensors Based on Manufacturing Variation},
	journal = {Journal of Low Power Electronics and Applications (JLPEA)},
	volume = {4},
	year = {2014},
	month = {09/2014},
	pages = {16},
	chapter = {252},
	author = {J.Bolus and B. H. Calhoun and T.Blalock}
}
@conference {346,
	title = {Fast, Accurate Variation-Aware Path Timing Computation for Sub-threshold Circuits},
	booktitle = {International Symposium on Quality Electronic Design (ISQED)},
	year = {2014},
	month = {02,2014},
	author = {Y. Zhang and B. H. Calhoun}
}
@conference {344,
	title = {Flexibility and Circuit Overheads in Reconfigurable SIMD/MIMD Systems},
	booktitle = {International Symposium on Field-Programmable Custom Computing Machines (FCCM)},
	year = {2014},
	month = {2014},
	author = {S. Arrabi and D. Moore and L. Wang and K. Skadron and B. H. Calhoun}
}
@conference {345,
	title = {LEDRA: A 3DIC Ultra-Low Power FPGA Architecture for DoD Applications},
	booktitle = {GOMAC Tech},
	year = {2014},
	month = {2014},
	author = {J. J. Granacki and B. H. Calhoun and A. R. Dasu and M. Jagasivamani and L. McIlrath and M. Fritze}
}
@conference {342,
	title = {Modeling SRAM Dynamic VMIN},
	booktitle = {International Conference on IC Design and Technology (ICICDT)},
	year = {2014},
	month = {06/2014},
	author = {Boley, J. and V. Chandra and R. Aitken and B. H. Calhoun}
}
@conference {348,
	title = {Pipelined Non-Strobed Sensing Scheme for Lowering BL Swing in Nano-scale Memories},
	booktitle = {VLSI Design Conference},
	year = {2014},
	month = {2014},
	author = {S. Khanna and S. V. Nalam and B. H. Calhoun}
}
@conference {336,
	title = {A Reduced-Memory FIR Filter Using Approximate Coefficients for Ultra-Low Power SoCs},
	booktitle = {S3S Conference},
	year = {2014},
	month = {10/2014},
	address = {Monterey, CA},
	author = {Klinefelter, A. and B. H. Calhoun}
}
@conference {347,
	title = {A Reverse Write Assist Circuit for SRAM Dynamic Write VMIN Tracking using Canary SRAMs},
	booktitle = {International Symposium on Quality Electronic Design (ISQED)},
	year = {2014},
	month = {02,2014},
	author = {A. Banerjee and M. Sinangil and J. Poulton and C. T. Gray and B. H. Calhoun}
}
@conference {356,
	title = {Self Calibrated Dynamic Write Margin Sensor for Low Power Read/Write Operations in Sub-32nm SRAM},
	booktitle = {Design Automation Conference (DAC)},
	year = {2014},
	author = {P. Beshay and V. Chandra and R. Aitken and B. H. Calhoun}
}
@article {338,
	title = {An Ultra-Low Energy Subthreshold SRAM Bitcell for Energy Constrained Biomedical Applications},
	journal = {Journal of Low Power Electronics and Applications (JLPEA)},
	volume = {4},
	year = {2014},
	month = {05,2014},
	pages = {19},
	chapter = {119},
	author = {A. Banerjee and B. H. Calhoun}
}
@article {288,
	title = {Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin},
	journal = {Journal of Low Power Electronics and Applications},
	year = {2012},
	month = {04/2012},
	author = {James Boley and Jiajing Wang and B. H. Calhoun}
}
@article {339,
	title = {Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM VMIN},
	journal = {Journal of Low Power Electronics and Applications (JLPEA)},
	volume = {2},
	year = {2012},
	month = {04/2012},
	pages = {12},
	chapter = {143},
	author = {Boley, J. and J. Wang and B. H. Calhoun}
}
@proceedings {299,
	title = {A Custom Processor for Node and Power Management of a Battery-less Body Sensor Node in 130nm CMOS},
	journal = {Custom Integrated Circuits Conference},
	year = {2012},
	month = {09/2012},
	address = {San Jose},
	author = {Y. Shakhsheer and Y. Zhang and B. Otis and B. H. Calhoun}
}
@article {340,
	title = {Tracking On-Chip Age Using Distributed, Embedded Sensors},
	journal = {Transactions on VLSI Systems (TVLSI)},
	volume = {20},
	year = {2012},
	month = {11/2012},
	pages = {12},
	chapter = {1974},
	author = {S. N. Wooters and A. C. Cabe and Z. Qi and J. Wang and R. W. Mann and B. H. Calhoun and M. R. Stan and T. N. Blalock}
}
@conference {258,
	title = {A 90nm Data Flow Processor Demonstrating Fine Grained DVS for Energy Efficient Operation from 0.25V to 1.2V},
	booktitle = {Custom Integrated Circuits Conference},
	year = {2011},
	month = {09/2011},
	address = {San Jose},
	author = {Y. Shakhsheer and S. Khanna and K. Craig and S. Arrabi and J. Lach and B. H. Calhoun}
}
@conference {285,
	title = {An Analytical Model for Performance Yield of Nanoscale SRAM Accounting for the Sense Amplifier Strobe Signal},
	booktitle = {Internation Symposium on Lower Power Electronics and Design (ISLPED)},
	year = {2011},
	author = {J. F. Ryan and S. Khanna and B. H. Calhoun}
}
@booklet {272,
	title = {Analyzing Subthreshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin},
	year = {2011},
	author = {Boley, J. and B. H. Calhoun and J. Wang}
}
@conference {259,
	title = {A Bio-Inspired Artificial Whisker for Fluid Motion Sensing with Increased Sensitivity and Reliability},
	booktitle = {IEEE Sensors},
	year = {2011},
	month = {10/2011},
	address = {Limrick, Ireland},
	author = {W.C. Eberhardt and Y.A. Shakhsheer and B. H. Calhoun}
}
@proceedings {284,
	title = {Cost-effective Safety and Fault Localization using Distributed Temporal Redundancy},
	journal = {CASES},
	year = {2011},
	author = {B. H. Meyer and B. H. Calhoun and J. C. Lach and K. Skadron}
}
@conference {239,
	title = {Dynamic Write Limited Minimum Operating Voltage for Nanoscale SRAM},
	booktitle = {Design Automation and Test Europe (DATE)},
	year = {2011},
	month = {03/2011},
	author = {S. Nalam and V. Chandra and R. C. Aitken and B. H. Calhoun}
}
@article {275,
	title = {Minimum Supply Voltage and Yield Estimation for Large SRAMs Under Parametric Variations},
	journal = {Transactions on VLSI Systems (TVLSI)},
	year = {2011},
	author = {J. Wang and B. H. Calhoun}
}
@article {283,
	title = {Non-Random Device Mismatch Considerations in Nanoscale SRAM},
	journal = {IEEE Transactions of VLSI Systems (TVLSI)},
	year = {2011},
	author = {R. W. Mann and T. B. Hook and P. Nguyen and B. H. Calhoun}
}
@booklet {273,
	title = {A Programmable Multi-channel Sub-threshold FIR Filter for a Body Area Sensor Node},
	year = {2011},
	author = {A.M. Klinefelter and B. H. Calhoun}
}
@conference {240,
	title = {Reducing the Cost of Redundant Execution in Safety-Critical Systems using Relaxed Dedication},
	booktitle = {Design Automation and Test in Europe (DATE)},
	year = {2011},
	month = {03/2011},
	author = {B. H. Meyer and K. Skadron and N. George and B. H. Calhoun and J. Lach}
}
@booklet {286,
	title = {A Sub-0.5V Lattice-Based Public-Key Encryption Scheme for RFID Platforms in 130nm},
	year = {2011},
	address = {2011 Workshop on RFID Security},
	author = {Y. Yu and J. Huang and S. Khanna and B. H. Calhoun and J. Lach and A. Shelat and D. Evans}
}
@article {282,
	title = {Tracking On-Chip Age Using Distributed, Embedded Sensors},
	journal = {Transactions on VLSI Systems (TVLSI)},
	year = {2011},
	author = {Stuart N. Wooters and A. C. Cabe and Z. Qi and J. Wang and R. W. Mann and B. H. Calhoun and M. R. Stan and Travis N. Blalock}
}
@article {274,
	title = {What is a Body Sensor Network?},
	journal = {ACM / SIGDA Newsletter},
	volume = {41},
	year = {2011},
	month = {10/2011},
	author = {B. H. Calhoun and J. Lach}
}
@conference {37,
	title = {Asymmetric 6T SRAM with Two-phase Write and Split Bitline Differential Sensing for Low Voltage Operation},
	booktitle = {ISQED},
	year = {2010},
	pages = {139-146},
	author = {S. Nalam and V. Chandra and C. Pietrzyk and R. C. Aitken and B. H. Calhoun}
}
@conference {84,
	title = {A Capacitance-Based Whisker-like Artificial Sensor for Fluid Motion Sensing},
	booktitle = {IEEE Sensors},
	year = {2010},
	author = {J.B. Stocking and W.C. Eberhardt and Y.A. Shakhsheer and J.R. Paulus and M. Appleby and B. H. Calhoun}
}
@article {69,
	title = {Impact of circuit assist methods on margin and performance in 6T SRAM},
	journal = {Journal of Solid State Electronics},
	volume = {54},
	year = {2010},
	note = {published},
	month = {11/2010},
	pages = {1398-1407},
	publisher = {Elsevier},
	chapter = {1398},
	keywords = {Process variation, Read assist, Scaling, SNM, SRAM, Vmin, Write assist, Write margin, Yield},
	url = {http://www.sciencedirect.com/science?_ob=ArticleURL\&_udi=B6TY5-50GTRCY-1\&_user=709071\&_coverDate=11\%2F30\%2F2010\&_rdoc=1\&_fmt=high\&_orig=search\&_sort=d\&_docanchor=\&view=c\&_acct=C000039638\&_version=1\&_urlVersion=0\&_userid=709071\&md5=2d0ef46bf2e72b91309a5c16},
	author = {R. W. Mann and J. Wang and S. Nalam and S. Khanna and G. Braceras and H. Pilo and B. H. Calhoun}
}
@conference {224,
	title = {Improving SRAM Vmin and Yield by Using Variation-Aware BTI Stress},
	booktitle = {CICC},
	year = {2010},
	month = {09/2010},
	address = {San Jose, CA},
	author = {Jiajing Wang and Nalam, Satyanand and Jerry Qi and R. W. Mann and Mircea Stan and B. H. Calhoun}
}
@conference {77,
	title = {REESES: Rapid Efficient Energy Scalable ElectronicS},
	booktitle = {GOMAC Tech},
	year = {2010},
	month = {03/2010},
	author = {B. H. Calhoun and S. Arrabi and S. Khanna and Y. Shakhsheer and K. Craig and J. Ryan and J. Lach}
}
@conference {70,
	title = {Virtual Prototyper (ViPro): An Early Design Space Exploration and Optimization Tool for SRAM Designers},
	booktitle = {Design Automation Conference (DAC)},
	year = {2010},
	month = {06/2010},
	pages = {138-143},
	author = {S. Nalam and M. Bhargava and K. Mai and B. H. Calhoun}
}
@conference {11,
	title = {Asymmetric Sizing in a 45nm 5T SRAM to Improve Read Stability over 6T},
	booktitle = {CICC},
	year = {2009},
	pages = {709-712},
	author = {S. Nalam and B. H. Calhoun}
}
@article {10,
	title = {Body Area Sensor Networks: Challenges and Opportunities},
	journal = {Computer},
	volume = {42},
	number = {1},
	year = {2009},
	month = {1/2009},
	pages = {58{\textendash}65},
	publisher = {IEEE Computer Society Press Los Alamitos, CA, USA},
	author = {Hanson, M.A. and Powell Jr, H.C. and Barth, A.T. and Ringgenberg, K. and B. H. Calhoun and Aylor, J.H. and J. Lach}
}
@conference {28,
	title = {An SRAM Prototyping Tool for Rapid Sub-32nm Design Exploration and Optimization},
	booktitle = {TECHCON},
	year = {2009},
	abstract = {SRAM design in scaled technologies increasingly requires circuit innovations such as read/write assist techniques or alternative bitcells to ensure even basic functionality. However, the lack of a quick mechanism for understanding the impact of these circuit level changes on system level metrics makes accurate assessments of new circuit techniques difficult. Thus, we introduce Virtual Prototyper (ViPro), a tool that helps circuit designers explore this large design space by rapidly generating optimized virtual prototypes of complete SRAM macros. ViPro does this by allowing SRAM component specification with varying levels of detail {\textendash} from {\textquoteleft}black-box{\textquoteright} descriptions to complete netlists {\textendash} and by incorporating those components into a hierarchical model that captures circuit and architectural features of the SRAM to optimize a complete prototype. SRAM designers can use ViPro to generate base-case prototypes, which provide starting points for design space exploration, or to assess the impact of a low level circuit innovation on the overall SRAM design.},
	author = {M. Bhargava and S. Nalam and B. H. Calhoun and K. Mai}
}
@conference {calhoun-sub,
	title = {Sub-threshold Circuit Design with Shrinking CMOS Devices},
	booktitle = {International Symposium on Circuits and Systems},
	year = {2009},
	month = {3/24/2009},
	author = {B. H. Calhoun and S. Khanna and Mann, R. and J. Wang}
}
@conference {36,
	title = {A Technology-Agnostic Simulation Environment (TASE) for Iterative Custom IC Design across Processes},
	booktitle = {ICCD},
	year = {2009},
	pages = {523-528},
	author = {S. Nalam and M. Bhargava and Ringgenberg, K. and K. Mai and B. H. Calhoun}
}
@conference {21,
	title = {Analyzing Static and Dynamic Write Margin for Nanometer SRAMs},
	booktitle = {International Symposium on Low Power Electronics and Design},
	year = {2008},
	month = {08/2008},
	pages = {129-134},
	author = {J. Wang and S. Nalam and B. H. Calhoun}
}
