An Energy-Efficient Near/Sub-Threshold FPGA Interconnect Architecture Using Dynamic Voltage Scaling and Power-Gating

TitleAn Energy-Efficient Near/Sub-Threshold FPGA Interconnect Architecture Using Dynamic Voltage Scaling and Power-Gating
Publication TypeConference Paper
Year of Publication2016
AuthorsQi, H., O. Ayorinde, and B. H. Calhoun
Conference NameInternational Conference on Field-Programmable Technology (ICFPT 2016)
Date Published12/2016
PublisherIEEE
Conference LocationXi'an, China
Citation Key405
AttachmentSize
An Energy-Efficient Near-Sub-Threshold FPGA Interconnect Architecture Using Dynamic Voltage Scaling and Power-Gating.pdf959.91 KB
Slides.pdf1.91 MB