A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic

TitleA 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic
Publication TypeConference Paper
Year of Publication2016
AuthorsPatel, H. N., A. Roy, F. B. Yahya, N. Liu, K. Kumeno, M. Yasuda, A. Harada, T. Ema, and B. H. Calhoun
Conference NameEuropean Solid State Circuits Conference (ESSCIRC)
Citation Key390
AttachmentSize
A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic.pdf2.96 MB
ESSCIRC_ESSDERC2016__SessionA5L-E_4_HarshPatel.pdf5.1 MB