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A 256kb Sub-threshold SRAM in 65nm CMOS

Pub Year: 
2006
Primary Author: 
Pages: 
628-629
Date Published: 
February, 2018
Address: 
IEEE International Solid-State Circuits Conference
Attachments: 
2006_Calhoun_ISSCC.pdf
2006_Calhoun_ISSCC_slides.pdf
BibTeX Number: 
50
Pub Type: 
conference