A Sub-Threshold FPGA with Low-Swing Dual-VDD Interconnect in 90nm CMOS

TitleA Sub-Threshold FPGA with Low-Swing Dual-VDD Interconnect in 90nm CMOS
Publication TypeConference Paper
Year of Publication2010
AuthorsRyan, J. F., and B. H. Calhoun
Conference NameCustom Integrated Circuits Conference (CICC)
Date Published20/09/2010
Citation Key79
AttachmentSize
2010_Ryan_CICC.pdf808.71 KB