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"A 0.2 V, 23 nW CMOS Temperature Sensor for Ultra-Low-Power IoT Applications", J. Low Power Electron. Appl. (JLPEA), vol. 6, issue 2, 2016.
"A 0.38 pJ/bit 1.24 nW Chip-to-Chip Serial Link for Ultra-Low Power Systems", International Symposium on Circuits and Systems (ISCAS), Lisbon, 05/2015.
"A 0.6V 8 pJ/write Non-Volatile CBRAM Macro Embedded in a Body Sensor Node for Ultra Low Energy Applications", Symposium on VLSI Circuits, 2013.
"A 1.3μW, 5pJ/cycle sub-threshold MSP430 processor in 90nm xLP FDSOI for energy-efficient IoT applications", International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, IEEE, 2016.
"A 1.5nW, 32.768kHz XTAL Oscillator Operational from 0.3V Supply", IEEE Journal of Solid-State Circuits (JSSC), vol. 51, issue 3, 2016.
"A 10mV-Input Boost Converter with Inductor Peak Current Control and Zero Detection for Thermoelectric and Solar Energy Harvesting with 220mV Cold-Start and -14.5dBm, 915MHz RF Kick-Start", IEEE Journal of Solid-State Circuits (JSSC), vol. 50, issue 8, pp. 1820-1832, 08/2015.
"A 10mV-Input Boost Converter with Inductor Peak Current Control and Zero Detection for Thermoelectric Energy Harvesting", IEEE Custom Integrated Circuits Conference (CICC), 2014.
"A 130nm Canary SRAM for SRAM Dynamic Write VMIN Tracking across Voltage, Frequency, and Temperature Variations", Custom Integrated Circuits Conference (CICC), San Jose, CA, IEEE, 09/2015.
"A 145mV to 1.2V Single Ended Level Converter Circuit for Ultra-Low Power Low Voltage ICs", IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015.
"A 150nW, 5ppm/oC, 100kHz On-Chip Clock Source for Ultra Low Power SoCs", Custom Integrated Circuits Conference, San Jose, IEEE, 09/2012.
"A 2.6-μW Sub-threshold Mixed-signal ECG SoC", Symposium on VLSI Circuits, 6/15/2009.
"A 23 nW CMOS ultra-Low Power Temperature Sensor Operational from 0.2 V", IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, Rohnert Park, CA, IEEE, 10/2015.
"A 236nW -56.5dBm Sensitivity Self-Powered Bluetooth Low-Energy Wakeup Receiver in 65nm CMOS", IEEE International Solid-State Circuits Conference (ISSCC), 2016.
"A 256kb 65nm Sub-threshold SRAM Design for Ultra-low Voltage Operation", IEEE Journal of Solid-State Circuits (JSSC), vol. 42, pp. 680-688, 03/2007.
A 256kb Sub-threshold SRAM in 65nm CMOS, , IEEE International Solid-State Circuits Conference, pp. 628-629, 02/2006.
"A 32b 90nm Processor Implementing Panoptic DVS Achieving Energy Efficient Operation from Sub-threshold to High Performance", Journal of Solid State Circuits, 2014.
"A 32nW Bandgap Reference Voltage Operational from 0.5V Supply for Ultra-low Power Systems", EEE International Solid-State Circuits Conference (ISSCC), 2015.
"A 36nW, 7 ppm/oC Fully On-Chip Clock Source System for Ultra-Low Power Applications", Journal of Low Power Electronics and Applications (JLPEA), vol. 6, issue 2, 2016.
"39 fJ/bit On-Chip Identification of Wireless Sensors Based on Manufacturing Variation", Journal of Low Power Electronics and Applications (JLPEA), vol. 4, issue 3, pp. 16, 09/2014.
"A 50nW, 100kbps Clock/Data Recovery Circuit in an FSK RF Receiver on a Body Sensor Node", VLSI Design Conference, 01/2013.
"A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic", European Solid State Circuits Conference (ESSCIRC), 2016.
"5T SRAM with Asymmetric Sizing for Improved Read Stability", JSSC, 2011.
"A 6.45 μW Self-Powered IoT SoC with Integrated Energy-Harvesting Power Management and ULP Asymmetric Radios", ISSCC, San Francisco, CA, IEEE, 02/2015.
"A 6.45μW Self-Powered SoC with Integrated Energy-Harvesting Power Management and ULP Asymmetric Radios for Portable Biomedical Systems", IEEE Transactions on Biomedical Circuits and Systems, vol. 9, issue 6, pp. 862-874, 12/2015.