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Ryan, J. F., and B. H. Calhoun, "A Sub-Threshold FPGA with Low-Swing Dual-VDD Interconnect in 90nm CMOS", Custom Integrated Circuits Conference (CICC), 20/09/2010.  Download: 2010_Ryan_CICC.pdf (808.71 KB)
Wang, J., A. Singhee, R. A. Rutenbar, and B. H. Calhoun, "Two Fast Methods for Estimating the Minimum Standby Supply Voltage for Large SRAMs", Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 29, issue 12, pp. 1908-1920, 12/2010.  Download: 2010_Wang_TCAD.pdf (1.4 MB)
Mann, R. W., J. Wang, S. Nalam, S. Khanna, G. Braceras, H. Pilo, and B. H. Calhoun, "Impact of circuit assist methods on margin and performance in 6T SRAM", Journal of Solid State Electronics, vol. 54: Elsevier, pp. 1398-1407, 11/2010.  Download: 2010_Mann_SSE.pdf (793.53 KB)
Qi, J., J. Wang, B. H. Calhoun, and M. Stan, "SRAM-Based NBTI/PBTI Sensor System Design", Design Automation Conference (DAC), San Diego, CA, pp. 849-852, 06/2010.  Download: 2010_Qi_DAC.pdf (421.5 KB)
Calhoun, B. H., S. Khanna, Y. Zhang, J. Ryan, and B. Otis, "System Design Principles Combining Sub-threshold Circuits and Architectures with Energy Scavening Mechanisms", International Symposium on Circuits and Systems (ISCAS), Paris, France, pp. 269-272, 05/2010.  Download: 2010_Calhoun_ISCAS.pdf (537.44 KB)
Wooters, S. N., B. H. Calhoun, and T. N. Blalock, "An Energy-Efficient Subthreshold Level Converter in 130-nm CMOS", IEEE Transactions on Circuits and Systems II, vol. 57, pp. 290-294, 04/2010.  Download: 2010_Wooters_TCASII.pdf (565.79 KB)
Wang, J., and B. H. Calhoun, "Standby Supply Voltage Minimization for Reliable Nanoscale SRAMs", Solid State Circuits Technologies: INTECH, 2010.  Download: 2010_Wang_INTECH.pdf (763.49 KB)
Khanna, S., and B. H. Calhoun, "Serial Sub-threshold Circuits for Ultra-Low-Power Systems", International Symposium on Low Power Electronics and Design, 8/19/2009.  Download: 2009_Khanna_ISLPED.pdf (139.21 KB); 2009_Khanna_ISLPED_Slides.pdf (426.32 KB)