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Boley, J., J. Wang, and B. H. Calhoun, "Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM VMIN", Journal of Low Power Electronics and Applications (JLPEA), vol. 2, issue 2, pp. 12, 04/2012.
Calhoun, B. H., "Design Principles for Digital CMOS Integrated Circuit Design", The Modular Series of Microelectronic Device & Circuit Design, eds. C. Sodini and R. Howe: NTS Press, 03/2012.
Calhoun, B. H., and J. Lach, "What is a Body Sensor Network?", ACM / SIGDA Newsletter, vol. 41, issue 10, 10/2011.  Download: 2011_Calhoun_SIGDA.pdf (102.01 KB)