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Boley, J., V. Chandra, R. Aitken, and B. H. Calhoun, "Modeling SRAM Dynamic VMIN", International Conference on IC Design and Technology (ICICDT), 06/2014.
Banerjee, A., and B. H. Calhoun, "An Ultra-Low Energy Subthreshold SRAM Bitcell for Energy Constrained Biomedical Applications", Journal of Low Power Electronics and Applications (JLPEA), vol. 4, issue 2, pp. 19, 05,2014.
Klinefelter, A., Y. Zhang, B. Otis, and B. H. Calhoun, "A Programmable 34 nW/Channel Sub-Threshold Signal Band Power Extractor on a Body Sensor Node SoC", Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 59, issue 12, pp. 941, 12/2012.  Download: 2012_Klinefelter_CircuitsSystems.pdf (858.86 KB)
Shrivastava, A., and B. H. Calhoun, "A 150nW, 5ppm/oC, 100kHz On-Chip Clock Source for Ultra Low Power SoCs", Custom Integrated Circuits Conference, San Jose, IEEE, 09/2012.  Download: M-01.pdf (874.13 KB)