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Filters: Author is V. Chandra [Clear All Filters]
"Modeling SRAM Dynamic VMIN", International Conference on IC Design and Technology (ICICDT), 06/2014.
"Self Calibrated Dynamic Write Margin Sensor for Low Power Read/Write Operations in Sub-32nm SRAM", Design Automation Conference (DAC), 2014.
"Dynamic Write Limited Minimum Operating Voltage for Nanoscale SRAM", Design Automation and Test Europe (DATE), 03/2011.