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Filters: Author is Sudhanshu Khanna [Clear All Filters]
"A 32b 90nm Processor Implementing Panoptic DVS Achieving Energy Efficient Operation from Sub-threshold to High Performance", Journal of Solid State Circuits, 2014.
"A Programmable Resistive Power Grid for Post-Fabrication Flexibility and Energy Tradeoffs", International Symposium on Low Power Electronics and Design, 2012.
"A Sub-Threshold FPGA: Energy-Efficient Reconfigurable Logic", GOMAC Tech, 03/2011.
"Optimal Power Switch Design for Panoptic Dynamic Voltage Scaling Enabling Subthreshold Operation", Subthreshold Microelectronics Conference, 2011.
"Stepped Supply Voltage Switching for Energy Constrained Systems", ISQED, 2011.
"System Design Principles Combining Sub-threshold Circuits and Architectures with Energy Scavening Mechanisms", International Symposium on Circuits and Systems (ISCAS), Paris, France, pp. 269-272, 05/2010.
"Flexible Circuits and Architectures for Ultra Low Power", Proceedings of the IEEE, vol. 98, pp. 267-282, 02/2010.
"Serial Sub-threshold Circuits for Ultra-Low-Power Systems", International Symposium on Low Power Electronics and Design, 8/19/2009.
"Sub-threshold Operation and Cross-Hierarchy Design for Ultra Low Power Wearable Sensors", International Symposium on Circuits and Systems, 5/24/2009.