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Huang, Y., A. Shrivastava, and B. H. Calhoun, "A 145mV to 1.2V Single Ended Level Converter Circuit for Ultra-Low Power Low Voltage ICs", IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2015.
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Wang, J., S. Nalam, and B. H. Calhoun, "Analyzing Static and Dynamic Write Margin for Nanometer SRAMs", International Symposium on Low Power Electronics and Design, pp. 129-134, 08/2008.  Download: 2008_Wang_ISLPED.pdf (582.96 KB); 2008_Wang_ISLPED_Slides.pdf (703.11 KB)
Boley, J., J. Wang, and B. H. Calhoun, "Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM VMIN", Journal of Low Power Electronics and Applications (JLPEA), vol. 2, issue 2, pp. 12, 04/2012.
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