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"A 1.3μW, 5pJ/cycle sub-threshold MSP430 processor in 90nm xLP FDSOI for energy-efficient IoT applications", International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, IEEE, 2016, In Press.
"Exploring Circuit Robustness to Power Supply Variation in Low-Voltage Latch and Register-Based Digital Systems", IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, Canada, IEEE, 2016, In Press.
"Optimizing SRAM Bitcell Reliability and Energy for IoT Applications", International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, IEEE, 2016, In Press.
"Improving Reliability and Energy Requirements of Memory in Body Sensor Networks.", International Conference on VLSI Design, Kolkata, India, IEEE, In Press.
"A 6.45μW Self-Powered SoC with Integrated Energy-Harvesting Power Management and ULP Asymmetric Radios for Portable Biomedical Systems", IEEE Transactions on Biomedical Circuits and Systems, vol. 9, issue 6, pp. 862-874, 12/2015.
"A 23 nW CMOS ultra-Low Power Temperature Sensor Operational from 0.2 V", IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, Rohnert Park, CA, IEEE, 10/2015.
"A 130nm Canary SRAM for SRAM Dynamic Write VMIN Tracking across Voltage, Frequency, and Temperature Variations", Custom Integrated Circuits Conference (CICC), San Jose, CA, IEEE, 09/2015.
"Optimizing energy efficient low-swing interconnect for sub-threshold FPGAs", 2015 25th International Conference on Field Programmable Logic and Applications (FPL), London, UK, 09/2015.
"Using island-style bi-directional intra-CLB routing in low-power FPGAs", 25th International Conference on Field Programmable Logic and Applications (FPL), 09/2015.
"Combining SRAM Read/Write Assist Techniques for Near/Sub-Threshold Voltage Operation", 6th Asia Symposium on Quality Electronic Design (ASQED 2015), Kuala Lumpur, Malaysia, 08/2015.
"A 0.38 pJ/bit 1.24 nW Chip-to-Chip Serial Link for Ultra-Low Power Systems", International Symposium on Circuits and Systems (ISCAS), Lisbon, 05/2015.
"Error-Energy Analysis of Hardware Logarithmic Approximation Methods for Low Power Applications", International Symposium on Circuits and Systems (ISCAS), 05/2015.
"Stack Based Sense Amplifier Designs for Reducing Input-Referred Offset", International Symposium on Quality Electronic Design, 03/2015.
"A 6.45 μW Self-Powered IoT SoC with Integrated Energy-Harvesting Power Management and ULP Asymmetric Radios", ISSCC, San Francisco, CA, IEEE, 02/2015.
"Virtual Prototyper (ViPro): An SRAM Design Tool for Yield Constrained Optimization", Transactions of Very Large Scale Integration Systems, 2015.
"A 10mV-Input Boost Converter with Inductor Peak Current Control and Zero Detection for Thermoelectric Energy Harvesting", IEEE Custom Integrated Circuits Conference (CICC), 2014.
"Flexibility and Circuit Overheads in Reconfigurable SIMD/MIMD Systems", International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2014.
"LEDRA: A 3DIC Ultra-Low Power FPGA Architecture for DoD Applications", GOMAC Tech, 2014.
"Pipelined Non-Strobed Sensing Scheme for Lowering BL Swing in Nano-scale Memories", VLSI Design Conference, 2014.
"A Reduced-Memory FIR Filter Using Approximate Coefficients for Ultra-Low Power SoCs", S3S Conference, Monterey, CA, 10/2014.
"39 fJ/bit On-Chip Identification of Wireless Sensors Based on Manufacturing Variation", Journal of Low Power Electronics and Applications (JLPEA), vol. 4, issue 3, pp. 16, 09/2014.
"Modeling SRAM Dynamic VMIN", International Conference on IC Design and Technology (ICICDT), 06/2014.
"An Ultra-Low Energy Subthreshold SRAM Bitcell for Energy Constrained Biomedical Applications", Journal of Low Power Electronics and Applications (JLPEA), vol. 4, issue 2, pp. 19, 05,2014.