- Chip Gallery
- Photo Gallery
"A 32b 90nm Processor Implementing Panoptic DVS Achieving Energy Efficient Operation from Sub-threshold to High Performance", Journal of Solid State Circuits, Submitted.
"A 0.6V 8 pJ/write Non-Volatile CBRAM Macro Embedded in a Body Sensor Node for Ultra Low Energy Applications", Symposium on VLSI Circuits, 2013.
"Hold Time Closure for Subthreshold Circuits Using a Two-Phase, Latch Based Timing Method", S3S Conference, Monterey, California, 10/2013.
"Virtual Prototyping (ViPro) Tool for Memory Subsystem Design Exploration and Optimization", SRC TECHCON, 09/2013.
"A Digital Auto-Zeroing Circuit to Reduce Offset in Sub-threshold Sense Amplifiers", Journal of Low Power Electronics and Applications, 05/2013.
"Leveraging Sensitivity Analysis for Fast, Accurate Estimation of SRAM Dynamic VMIN", Design Automation and Test Europe, 03/2013.
"A 50nW, 100kbps Clock/Data Recovery Circuit in an FSK RF Receiver on a Body Sensor Node", VLSI Design Conference, 01/2013.
"A Batteryless 19 uW MICS/ISM-Band Energy Harvesting Body Sensor Node SoC for ExG Applications", Journal of Solid State Circuits, vol. 48, issue 1, pp. 199-213, 01/2013.
"Effect of Angle on Flow-Induced Vibrations of Pinniped Vibrissae", PLOS One, vol. Vol. 8, No. 7, issue July, 2013.
"An Ultra Low Energy 9T Half-select-free Subthreshold SRAM bitcell", S3S, Monterey, CA, 2013.
"A Programmable 34 nW/Channel Sub-Threshold Signal Band Power Extractor on a Body Sensor Node SoC", Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 59, issue 12, pp. 941, 12/2012.
"Modeling DC-DC Converter Efficiency and Power Management in Ultra Low Power Systems", Subthreshold Microelectronics Conference, 10/2012.
"SRAM Sense Amplifier Offset Cancellation Using BTI Stress", Subthreshold Microelectronics Conference, 10/2012.
"Sub-threshold Sense Amplifier Compensation Using Auto-zeroing Circuitry", Subthreshold Microelectronics Conference, 10/2012.
"A 150nW, 5ppm/oC, 100kHz On-Chip Clock Source for Ultra Low Power SoCs", Custom Integrated Circuits Conference, San Jose, IEEE, 09/2012.
"A Custom Processor for Node and Power Management of a Battery-less Body Sensor Node in 130nm CMOS", Custom Integrated Circuits Conference, San Jose, 09/2012.
"Reducing the Cost of Safety-Critical Systems with On-Demand Redundancy", SRC Techcon, 09/2012.
"Dark vs. Dim Silicon and Near-Threshold Computing", Dark Silicon Workshop (DaSi), 06/2012.
"Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin", Journal of Low Power Electronics and Applications, 04/2012.
"Design Principles for Digital CMOS Integrated Circuit Design", The Modular Series of Microelectronic Device & Circuit Design, eds. C. Sodini and R. Howe: NTS Press, 03/2012.
"A Batteryless 19uW MICS/ISM-Band Energy Harvesting Body Area Sensor Node SoC", ISSCC, San Francisco, 02/2012.
"A Charge Pump Based Receiver Circuit for a Voltage Scaled Interconnect", International Symposium on Low Power Electronics and Design, 2012.
"Optimal Power Switch Design for Dynamic Voltage Scaling from High Performance to Subthreshold Operation", International Symposium on Low Power Electronics and Design, 2012.