Publications
"Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin",
Journal of Low Power Electronics and Applications, 04/2012.
Download: Boley_JLPEA2012.pdf (295.75 KB)
"A Batteryless 19uW MICS/ISM-Band Energy Harvesting Body Area Sensor Node SoC",
ISSCC, San Francisco, 02/2012.
Download: Zhang_ISSCC2012_Paper.pdf (347.29 KB); Zhang_ISSCC2012_Slides.pdf (1.45 MB)
"A Charge Pump Based Receiver Circuit for a Voltage Scaled Interconnect",
International Symposium on Low Power Electronics and Design, 2012.
"Optimal Power Switch Design for Dynamic Voltage Scaling from High Performance to Subthreshold Operation",
International Symposium on Low Power Electronics and Design, 2012.
"A Programmable Resistive Power Grid for Post-Fabrication Flexibility and Energy Tradeoffs",
International Symposium on Low Power Electronics and Design, 2012.
"A Bio-Inspired Artificial Whisker for Fluid Motion Sensing with Increased Sensitivity and Reliability",
IEEE Sensors , Limrick, Ireland, 10/2011.
Download: Eberhardt_IEEESensors2011.pdf (334.78 KB)
"What is a Body Sensor Network?",
ACM / SIGDA Newsletter, vol. 41, issue 10, 10/2011.
Download: CalhounLach_WhatIs_Sigda_2011.pdf (102.01 KB)
"A 90nm Data Flow Processor Demonstrating Fine Grained DVS for Energy Efficient Operation from 0.25V to 1.2V",
Custom Integrated Circuits Conference, San Jose, 09/2011.
Download: PDVS_CICC2011_Paper.pdf (512.11 KB); PDVS_CICC2011_Slides.pdf (1.4 MB)
"Energy Efficient Design for Body Sensor Nodes",
Journal of Low Power Electronics and Applications, 04/2011.
Download: Zhang_JLPEA2011.pdf (1.5 MB)
"Dynamic Write Limited Minimum Operating Voltage for Nanoscale SRAM",
Design Automation and Test Europe (DATE), 03/2011.
Download: Nalam_DATE2011_paper.PDF (212.32 KB); Nalam_DATE2011_slides.pdf (1.7 MB)
"Reducing the Cost of Redundant Execution in Safety-Critical Systems using Relaxed Dedication",
Design Automation and Test in Europe (DATE), 03/2011.
Download: Meyer_DATE2011_paper.PDF (271.44 KB)
"A Sub-Threshold FPGA: Energy-Efficient Reconfigurable Logic",
GOMAC Tech, 03/2011.
"5T SRAM with Asymmetric Sizing for Improved Read Stability",
JSSC, 2011.
"An Analytical Model for Performance Yield of Nanoscale SRAM Accounting for the Sense Amplifier Strobe Signal",
Internation Symposium on Lower Power Electronics and Design (ISLPED), 2011.
"Body Sensor Networks: A Holistic Approach From Silicon to Users",
IEEE Proceedings, 2011.
"An Enhanced Canary-based System with BIST for SRAM Standby Power Reduction",
Transactions on VLSI Systems (TVLSI), 2011.
Download: 2011_WangCalhoun_TVLSI.pdf (698.5 KB)
"Minimum Supply Voltage and Yield Estimation for Large SRAMs Under Parametric Variations",
Transactions on VLSI Systems (TVLSI), 2011.
Download: WangCalhoun_TVLSI_modeling_2011.pdf (727.42 KB)
"New category of ultra-thin notchless 6T SRAM cell layout topologies for sub-22nm",
ISQED (Accepted for 2011), 2011.
Download: Mann_ISQED2011_paper.pdf (1.55 MB)
"Non-Random Device Mismatch Considerations in Nanoscale SRAM",
IEEE Transactions of VLSI Systems (TVLSI), 2011.
"Stepped Supply Voltage Switching for Energy Constrained Systems",
ISQED, 2011.
Download: Khanna_ISQED2011_paper.pdf (1.53 MB); Khanna_ISQED2011_slides.pdf (981.11 KB)

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