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A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic

Pub Year: 
2016
Primary Author: 
Coference, Book, or Journal: 
European Solid State Circuits Conference (ESSCIRC)
Attachments: 
A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic.pdf
ESSCIRC_ESSDERC2016__SessionA5L-E_4_HarshPatel.pdf
BibTeX Number: 
390
Pub Type: 
conference